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Trig link capture and lpGBT alignment#415

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trig-link-capture-dev
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Trig link capture and lpGBT alignment#415
tomeichlersmith wants to merge 10 commits into
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trig-link-capture-dev

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@tomeichlersmith tomeichlersmith commented May 13, 2026

Further work by @jmmans that I'm copying from his branch trig_link_split onto main.

  • new TRIG object and TRIG menu to help with viewing the trig elinks and align them on the zcu
  • update tasks.setup.align_econ_lpgbt to support ECON-T and its first eTx

To Do

  • replicate re-alignment of trigger elinks
  • expand bit alignment across all eTx that are enabled (add mapping of ECON-T eTx to lpGBT input channel to TRIG class) OR determine this is a separate issue
  • debug PRBS test with a check_all parameter that prints out error rate for each phase checked

@tomeichlersmith tomeichlersmith linked an issue May 13, 2026 that may be closed by this pull request
@tomeichlersmith tomeichlersmith changed the title Trig link capture dev Trig link capture and lpGBT alignment May 14, 2026
@tomeichlersmith tomeichlersmith force-pushed the trig-link-capture-dev branch from 2a33f2b to ec1c4c9 Compare May 20, 2026 15:46
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tomeichlersmith commented May 20, 2026

From looking through the lpGBT Mezzanine schematics, I get the following mapping.
Since the lpGBT mezzanine is shared between Hcal and Ecal, this will help inform the mappings from ECON-T eTx to lpGBT input eLink.

Mezz Port lpGBT Port Interp
DIN_{P,N}0 EDIN00_{P,N} eLink Input Group 0 Link 0
DIN_{P,N}1 EDIN10_{P,N} eLink Input Group 1 Link 0
DIN_{P,N}2 EDIN20_{P,N} eLink Input Group 2 Link 0
DIN_{P,N}3 EDIN40_{P,N} eLink Input Group 4 Link 0
DIN_{P,N}4 EDIN50_{P,N} eLink Input Group 5 Link 0
DIN_{P,N}5 EDIN60_{P,N} eLink Input Group 6 Link 0
DOUT_{P,N}0 EDOUT00_{P,N} eLink Output Group 0 Link 0
DOUT_{P,N}1 EDOUT01_{P,N} eLink Output Group 0 Link 1
DOUT_{P,N}2 EDOUT10_{P,N} eLink Output Group 1 Link 0
DOUT_{P,N}3 EDOUT20_{P,N} eLink Output Group 2 Link 0
DOUT_{P,N}4 EDOUT21_{P,N} eLink Output Group 2 Link 1
DOUT_{P,N}5 EDOUT30_{P,N} eLink Output Group 3 Link 0
DOUT_{P,N}6 EDOUT31_{P,N} eLink Output Group 3 Link 1

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jmmans commented May 20, 2026

The firmware hides this for data capture purposes, but it cannot hide it for configuration purposes (e.g. when picking which registers in the lpGBT to adjust)

@tomeichlersmith
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HcalBackplane's connection between the ECON-mezzanine and lpGBT mezzanine does not shuffle these inputs further. The three lowest DIN are assigned to the first ECON-T and the three highest are the second ECON-T.

  • ECON-T1 -> TIN 0, 1, 2 -> DIN 0, 1, 2
  • ECON-T2 -> TIN 3, 4, 5 -> DIN 3, 4, 5

I think the EcalSMM is the same, but all 6 DIN originate from a single ECON-T.

@tomeichlersmith tomeichlersmith force-pushed the trig-link-capture-dev branch from bc73ba8 to 39d30df Compare May 21, 2026 16:26
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