Fix reverse NVVM barrier calls for LLVM 21+ CUDA intrinsics

[Copilot]

Enzyme was emitting malformed reverse-mode NVVM barrier calls on newer LLVM/Clang CUDA toolchains. In particular, LLVM 21+ llvm.nvvm.barrier.cta.sync.aligned.* intrinsics require explicit operands, but Enzyme was recreating some reverse barrier calls with an empty argument list.

• Reverse-mode NVVM barrier lowering

  • Preserve the correct intrinsic signature across LLVM version boundaries:
    • LLVM 19/20: continue emitting zero-arg llvm.nvvm.barrier0()
    • LLVM 21: emit llvm.nvvm.barrier.cta.sync.aligned.all/count with the required barrier id / count operands
    • LLVM 22+: also map the newer barrier.cta.red.*.aligned.{all,count} reductions back to the matching sync intrinsic with the correct operands
  • Avoid reusing reduction operands as barrier ids on LLVM 21, where the legacy barrier0_* reduction intrinsics still use the old operand shape

• Version-specific correctness

  • Split the reverse barrier handling at the LLVM 21 / 22 boundary rather than treating all >20 versions the same
  • Use constant barrier id 0 when lowering LLVM 21 legacy reduction barriers to sync.aligned.all, matching LLVM’s NVVM upgrade semantics

• Regression coverage

  • Add a focused reverse-mode CUDA lit test covering:
    • legacy llvm.nvvm.barrier0()
    • llvm.nvvm.barrier.cta.sync.aligned.all(i32)
    • llvm.nvvm.barrier.cta.sync.aligned.count(i32, i32)

Example of the corrected reverse IR shape on newer LLVM:

; before
call void @llvm.nvvm.barrier.cta.sync.aligned.all()

; after
call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0)

[minansys]

change "#if LLVM_VERSION_MAJOR > 20
auto BarrierInst = Arch == Triple::amdgcn
? (llvm::Intrinsic::ID)Intrinsic::amdgcn_s_barrier
: (llvm::Intrinsic::ID)
Intrinsic::nvvm_barrier_cta_sync_aligned_all;
#else
auto BarrierInst = Arch == Triple::amdgcn
? (llvm::Intrinsic::ID)Intrinsic::amdgcn_s_barrier
: (llvm::Intrinsic::ID)Intrinsic::nvvm_barrier0;
#endif
instbuilder.CreateCall(
getIntrinsicDeclaration(gutils->newFunc->getParent(), BarrierInst),
{});" to "#if LLVM_VERSION_MAJOR > 20
auto BarrierInst = Arch == Triple::amdgcn
? (llvm::Intrinsic::ID)Intrinsic::amdgcn_s_barrier
: (llvm::Intrinsic::ID)
Intrinsic::nvvm_barrier_cta_sync_aligned_all;
#else
auto BarrierInst = Arch == Triple::amdgcn
? (llvm::Intrinsic::ID)Intrinsic::amdgcn_s_barrier
: (llvm::Intrinsic::ID)Intrinsic::nvvm_barrier0;
#endif
SmallVector<Value *, 1> BarrierArgs;
#if LLVM_VERSION_MAJOR > 20
if (Arch != Triple::amdgcn) {
BarrierArgs.push_back(
ConstantInt::get(Type::getInt32Ty(gutils->newFunc->getContext()),
0));
}
#endif
instbuilder.CreateCall(
getIntrinsicDeclaration(gutils->newFunc->getParent(), BarrierInst),
BarrierArgs);" in Enzyme/EnzymeLogic.cpp 2) use clang format to format it to pass the format reuirement "DoozyX/clang-format-lint-action@v0.20
with:
source: enzyme/Enzyme enzyme/tools/enzyme-tblgen
exclude: ./CMakeLists.txt enzyme/Enzyme/SCEV
style: llvm
clangFormatVersion: 16
extensions: c,h,C,H,cpp,hpp,cc,hh,c++,h++,cxx,hxx
inplace: false"

[Copilot]

change "#if LLVM_VERSION_MAJOR > 20
auto BarrierInst = Arch == Triple::amdgcn
? (llvm::Intrinsic::ID)Intrinsic::amdgcn_s_barrier...

Addressed in 078c6be. EnzymeLogic.cpp now passes i32 0 when creating the LLVM > 20 NVVM barrier call, leaves AMDGCN unchanged, and the file was formatted with clang-format-16. I also rebuilt LLVMEnzyme-16 and reran the focused CUDA reverse-mode tests (cuda-barrier-sync.ll and sharedcachefwd.ll).

[superustc]

fix this formating issue "--- enzyme/Enzyme/AdjointGenerator.h (original)
+++ enzyme/Enzyme/AdjointGenerator.h (reformatted)
@@ -4013,8 +4013,8 @@
case Intrinsic::nvvm_barrier0_or: {
SmallVector<Value *, 1> args = {
ConstantInt::get(Type::getInt32Ty(M->getContext()), 0)};

•    auto *Fn =
  

•        getIntrinsicDeclaration(M, Intrinsic::nvvm_barrier_cta_sync_aligned_all);
  

•    auto *Fn = getIntrinsicDeclaration(
  

•        M, Intrinsic::nvvm_barrier_cta_sync_aligned_all);
     auto cal = cast<CallInst>(Builder2.CreateCall(Fn, args));
     cal->setCallingConv(Fn->getCallingConv());
     cal->setDebugLoc(gutils->getNewFromOriginal(I.getDebugLoc()));
  

@@ -4025,8 +4025,8 @@
case Intrinsic::nvvm_barrier_cta_red_or_aligned_all:
case Intrinsic::nvvm_barrier_cta_red_popc_aligned_all: {
SmallVector<Value *, 1> args = {I.getOperand(0)};

•    auto *Fn =
  

•        getIntrinsicDeclaration(M, Intrinsic::nvvm_barrier_cta_sync_aligned_all);
  

•    auto *Fn = getIntrinsicDeclaration(
  

•        M, Intrinsic::nvvm_barrier_cta_sync_aligned_all);
     auto cal = cast<CallInst>(Builder2.CreateCall(Fn, args));
     cal->setCallingConv(Fn->getCallingConv());
     cal->setDebugLoc(gutils->getNewFromOriginal(I.getDebugLoc()));"
  

[minansys]

fix this clang format issue "--- enzyme/Enzyme/AdjointGenerator.h (original)
+++ enzyme/Enzyme/AdjointGenerator.h (reformatted)
@@ -4013,8 +4013,8 @@
case Intrinsic::nvvm_barrier0_or: {
SmallVector<Value *, 1> args = {
ConstantInt::get(Type::getInt32Ty(M->getContext()), 0)};

•    auto *Fn =
  

•        getIntrinsicDeclaration(M, Intrinsic::nvvm_barrier_cta_sync_aligned_all);
  

•    auto *Fn = getIntrinsicDeclaration(
  

•        M, Intrinsic::nvvm_barrier_cta_sync_aligned_all);
     auto cal = cast<CallInst>(Builder2.CreateCall(Fn, args));
     cal->setCallingConv(Fn->getCallingConv());
     cal->setDebugLoc(gutils->getNewFromOriginal(I.getDebugLoc()));
  

@@ -4025,8 +4025,8 @@
case Intrinsic::nvvm_barrier_cta_red_or_aligned_all:
case Intrinsic::nvvm_barrier_cta_red_popc_aligned_all: {
SmallVector<Value *, 1> args = {I.getOperand(0)};

•    auto *Fn =
  

•        getIntrinsicDeclaration(M, Intrinsic::nvvm_barrier_cta_sync_aligned_all);
  

•    auto *Fn = getIntrinsicDeclaration(
  

•        M, Intrinsic::nvvm_barrier_cta_sync_aligned_all);
     auto cal = cast<CallInst>(Builder2.CreateCall(Fn, args));
     cal->setCallingConv(Fn->getCallingConv());
     cal->setDebugLoc(gutils->getNewFromOriginal(I.getDebugLoc()));"
  

duplication

[minansys]

fix the the clang format issue "--- enzyme/Enzyme/AdjointGenerator.h (original)
+++ enzyme/Enzyme/AdjointGenerator.h (reformatted)
@@ -4013,8 +4013,8 @@
case Intrinsic::nvvm_barrier0_or: {
SmallVector<Value *, 1> args = {
ConstantInt::get(Type::getInt32Ty(M->getContext()), 0)};

•    auto *Fn =
  

•        getIntrinsicDeclaration(M, Intrinsic::nvvm_barrier_cta_sync_aligned_all);
  

•    auto *Fn = getIntrinsicDeclaration(
  

•        M, Intrinsic::nvvm_barrier_cta_sync_aligned_all);
     auto cal = cast<CallInst>(Builder2.CreateCall(Fn, args));
     cal->setCallingConv(Fn->getCallingConv());
     cal->setDebugLoc(gutils->getNewFromOriginal(I.getDebugLoc()));
  

@@ -4025,8 +4025,8 @@
case Intrinsic::nvvm_barrier_cta_red_or_aligned_all:
case Intrinsic::nvvm_barrier_cta_red_popc_aligned_all: {
SmallVector<Value *, 1> args = {I.getOperand(0)};

•    auto *Fn =
  

•        getIntrinsicDeclaration(M, Intrinsic::nvvm_barrier_cta_sync_aligned_all);
  

•    auto *Fn = getIntrinsicDeclaration(
  

•        M, Intrinsic::nvvm_barrier_cta_sync_aligned_all);
     auto cal = cast<CallInst>(Builder2.CreateCall(Fn, args));
     cal->setCallingConv(Fn->getCallingConv());
     cal->setDebugLoc(gutils->getNewFromOriginal(I.getDebugLoc()));"
  

[Copilot]

fix this clang format issue "--- enzyme/Enzyme/AdjointGenerator.h (original)
+++ enzyme/Enzyme/AdjointGenerator.h (reformatted)
@@ -4013,8 +4013,8 @@...

Fixed in 01e0b55. AdjointGenerator.h now matches clang-format-16 for those getIntrinsicDeclaration(...) calls, and I rebuilt LLVMEnzyme-16 plus reran the focused CUDA reverse-mode tests (cuda-barrier-sync.ll and sharedcachefwd.ll).

[Copilot]

fix the the clang format issue "--- enzyme/Enzyme/AdjointGenerator.h (original)
+++ enzyme/Enzyme/AdjointGenerator.h (reformatted)
@@ -4013,8 +4013,8 @@...

Already fixed in 01e0b55. AdjointGenerator.h has the clang-format-16 wrapping for those getIntrinsicDeclaration(...) calls in the current branch head.