From 77cdb1161c5c0bff923889659b68e17fa66ad565 Mon Sep 17 00:00:00 2001 From: "Zachary J. Fields" Date: Thu, 2 Apr 2026 15:22:51 -0500 Subject: [PATCH 1/2] fix: Cygnet clean-up - improve comment accuracy - macro variable rename --- .../PeripheralPins_CYGNET.c | 1 + .../variant_CYGNET.cpp | 30 ++++++++----------- .../variant_CYGNET.h | 4 +-- 3 files changed, 16 insertions(+), 19 deletions(-) diff --git a/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/PeripheralPins_CYGNET.c b/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/PeripheralPins_CYGNET.c index 38b8531174..cdf2173c08 100644 --- a/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/PeripheralPins_CYGNET.c +++ b/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/PeripheralPins_CYGNET.c @@ -12,6 +12,7 @@ */ /* * Manually generated by Blues with knowledge of the CYGNET schematic + * https://github.com/blues/note-hardware/blob/master/Cygnet/v1.2/Schematic%20Prints.pdf */ #if defined(ARDUINO_CYGNET) #include "Arduino.h" diff --git a/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/variant_CYGNET.cpp b/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/variant_CYGNET.cpp index fb63c60fb0..51e717d209 100644 --- a/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/variant_CYGNET.cpp +++ b/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/variant_CYGNET.cpp @@ -132,7 +132,6 @@ WEAK void initVariant(void) * Key features: * - SYSCLK = 80 MHz from MSI (4 MHz, Range 6) via PLL (4MHz x 40/2) * - USB FS (48 MHz) sourced from PLLSAI1 (4MHz x 24/2) - * - HSI disabled to reduce current consumption (~200-300 uA) * - LSE enabled with medium-low drive for RTC and MSI auto-calibration (MSIPLLEN) * - Voltage Scale 1 required for 80 MHz operation * - FLASH_LATENCY_4 required for HCLK > 64 MHz at VOS1 (RM0394 s.3.3.3) @@ -140,9 +139,8 @@ WEAK void initVariant(void) * - Wake-up clock after STOP: MSI (PLL must be re-locked manually after wake) * * References: - * - RM0394 Rev 6 (STM32L43x/L44x) - s.6.2 "MSI clock" - * - RM0394 s.6.2.9 "MSI PLL-mode" - * - RM0394 s.3.3.3 "Performance versus VDD and clock frequency" + * - RM0394 Rev 6 (STM32L43x/L44x) - s.6.2.3 "MSI clock" (includes MSI PLL-mode) + * - RM0394 s.3.3.3 "Read access latency" * - AN2867 Rev 11 - "Oscillator design guide for STM8AF/AL/S, STM32 MCUs and MPUs" */ WEAK void SystemClock_Config(void) @@ -153,15 +151,15 @@ WEAK void SystemClock_Config(void) /** Enable PWR peripheral clock * - * RM0394 s.5.1.2: PWR registers are on APB1. PWREN (RCC_APB1ENR1 bit 28) - * resets to 1, so this is defensive rather than strictly necessary, but - * required for correctness if PWREN has been cleared by prior code. + * RM0394 s.6.4.18: PWREN (RCC_APB1ENR1 bit 28) resets to 0, so this call + * is required before accessing any PWR register (e.g., + * HAL_PWREx_ControlVoltageScaling below). * CubeMX generates this unconditionally for all STM32L4 projects. */ __HAL_RCC_PWR_CLK_ENABLE(); /* Voltage scaling - Scale 1 required for SYSCLK = 80 MHz - * RM0394 s.6.1: VOS2 supports up to 26 MHz only + * RM0394 s.5.1.7: VOS2 supports up to 26 MHz only */ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) { Error_Handler(); @@ -186,17 +184,15 @@ WEAK void SystemClock_Config(void) * * Oscillator configuration summary: * - MSI: MSIRANGE_6 (4 MHz) -- used as PLL input - * - HSI: OFF -- Unused, disabling it saves ~200-300 uA * - PLL: ON (MSI 4MHz x PLLN=40 / PLLR=2 = 80 MHz) * - SYSCLK: PLLCLK (80 MHz) * - USB clock: PLLSAI1 (48 MHz) * - MSIRDY transient can not stall SysTick because SYSCLK = PLL, not MSI. - * - FLASH_LATENCY: 4 (required for 80 MHz / VOS1 per RM0394 s.3.3) + * - FLASH_LATENCY: 4 (required for 80 MHz / VOS1 per RM0394 s.3.3.3) */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_MSI; RCC_OscInitStruct.LSEState = RCC_LSE_ON; - RCC_OscInitStruct.HSIState = RCC_HSI_OFF; RCC_OscInitStruct.MSIState = RCC_MSI_ON; RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; @@ -217,12 +213,12 @@ WEAK void SystemClock_Config(void) * the PLL output, completely decoupled from MSI. Any subsequent MSIRDY * transient (from HAL_RCCEx_EnableMSIPLLMode below) cannot stall SysTick. */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK - | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 + | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_SYSCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; /* FLASH_LATENCY_4: required for HCLK > 64 MHz at VOS1 (RM0394 s.3.3.3) */ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) { Error_Handler(); @@ -259,7 +255,7 @@ WEAK void SystemClock_Config(void) /** Enable MSI Auto calibration (MSIPLLEN, RCC_CR[2]) * - * RM0394 s.6.2 (MSI clock): setting MSIPLLEN causes the MSI hardware + * RM0394 s.6.2.3 (MSI clock): setting MSIPLLEN causes the MSI hardware * to automatically trim itself against LSE as a phase reference, * reducing MSI frequency error to < +/-0.25%. LSE must already be * stable (LSERDY=1) before the bit is set -- guaranteed here because @@ -277,7 +273,7 @@ WEAK void SystemClock_Config(void) * * (2) If SYSCLK were MSI, a deadlock would be possible: MSIRDY * drops -> SysTick stalls -> HAL_GetTick() freezes -> any - * subsequent timeout loop never exits. RM0394 s.6.2.9 confirms + * subsequent timeout loop never exits. RM0394 s.6.2 confirms * SysTick is driven by HCLK (= SYSCLK / AHBdiv). Because * SYSCLK is now PLLCLK (80 MHz), SysTick is completely * decoupled from MSI and the transient is harmless. diff --git a/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/variant_CYGNET.h b/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/variant_CYGNET.h index 28270043d4..b35325fe10 100644 --- a/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/variant_CYGNET.h +++ b/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/variant_CYGNET.h @@ -124,11 +124,11 @@ #define VMAIN_ADC PA4 #define VMAIN_ADC_DIV_BOT_R 4.3f #define VMAIN_ADC_DIV_TOP_R 10.0f - #define VMAIN_DIV_K ((double)((VMAIN_ADC_DIV_TOP_R + VMAIN_ADC_DIV_BOT_R) / VMAIN_ADC_DIV_BOT_R)) + #define VMAIN_ADC_DIV_K ((double)((VMAIN_ADC_DIV_TOP_R + VMAIN_ADC_DIV_BOT_R) / VMAIN_ADC_DIV_BOT_R)) #endif #ifndef VMAIN_MV # define VMAIN_MV() ({ \ - __HAL_ADC_CALC_DATA_TO_VOLTAGE(__LL_ADC_CALC_VREFANALOG_VOLTAGE(analogRead(AVREF), LL_ADC_GetResolution(ADC1)), analogRead(VMAIN_ADC), LL_ADC_GetResolution(ADC1)) * VMAIN_DIV_K; \ + __HAL_ADC_CALC_DATA_TO_VOLTAGE(__LL_ADC_CALC_VREFANALOG_VOLTAGE(analogRead(AVREF), LL_ADC_GetResolution(ADC1)), analogRead(VMAIN_ADC), LL_ADC_GetResolution(ADC1)) * VMAIN_ADC_DIV_K; \ }) #endif #ifndef CHARGE_DETECT From 68bdef33c73b9272f4770234d7f996b26fa1a84f Mon Sep 17 00:00:00 2001 From: "Zachary J. Fields" Date: Thu, 2 Apr 2026 15:24:05 -0500 Subject: [PATCH 2/2] fix: Swan Init and Clean-up --- .../PeripheralPins_SWAN_R5.c | 423 +++++++++--------- .../variant_SWAN_R5.cpp | 324 +++++++++----- .../variant_SWAN_R5.h | 357 +++++++-------- 3 files changed, 599 insertions(+), 505 deletions(-) diff --git a/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/PeripheralPins_SWAN_R5.c b/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/PeripheralPins_SWAN_R5.c index 8b152acdef..441f60cf3f 100644 --- a/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/PeripheralPins_SWAN_R5.c +++ b/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/PeripheralPins_SWAN_R5.c @@ -11,9 +11,8 @@ ******************************************************************************* */ /* - * Automatically generated from STM32L4R5Z(G-I)Yx.xml, STM32L4R9Z(G-I)Yx.xml - * STM32L4S5ZIYx.xml, STM32L4S9ZIYx.xml - * CubeMX DB release 6.0.21 + * Manually generated by Blues with knowledge of the SWAN_R5 schematic + * https://github.com/blues/note-hardware/blob/master/Swan/v3.0/Feather/Swan%20Feather%20schematic%20v3.0.pdf */ #if defined(ARDUINO_SWAN_R5) #include "Arduino.h" @@ -34,22 +33,22 @@ #ifdef HAL_ADC_MODULE_ENABLED WEAK const PinMap PinMap_ADC[] = { - {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 5, 0)}, // ADC1_IN5 - BAT VOLTAGE - {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 6, 0)}, // ADC1_IN6 - {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 7, 0)}, // ADC1_IN7 - {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 8, 0)}, // ADC1_IN8 - {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 9, 0)}, // ADC1_IN9 - {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 10, 0)}, // ADC1_IN10 - {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 11, 0)}, // ADC1_IN11 - {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 12, 0)}, // ADC1_IN12 - {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 15, 0)}, // ADC1_IN15 - {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 16, 0)}, // ADC1_IN16 - {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 1, 0)}, // ADC1_IN1 - {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 2, 0)}, // ADC1_IN2 - {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 3, 0)}, // ADC1_IN3 - {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 4, 0)}, // ADC1_IN4 - {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 13, 0)}, // ADC1_IN13 - {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 14, 0)}, // ADC1_IN14 + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 5, 0)}, // ADC1_IN5 - A8/BATTERY_VOLTAGE (STAT) + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 6, 0)}, // ADC1_IN6 - A1 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 7, 0)}, // ADC1_IN7 - A9/TX2 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 8, 0)}, // ADC1_IN8 - A0 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 9, 0)}, // ADC1_IN9 - A10/D10 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 10, 0)}, // ADC1_IN10 - A13/D13 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 11, 0)}, // ADC1_IN11 - A12/D12 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 12, 0)}, // ADC1_IN12 - A11/D11 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 15, 0)}, // ADC1_IN15 - A15/QIO1 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 16, 0)}, // ADC1_IN16 - A6 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 1, 0)}, // ADC1_IN1 - A14/SCL3 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 2, 0)}, // ADC1_IN2 - A3 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 3, 0)}, // ADC1_IN3 - A7 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 4, 0)}, // ADC1_IN4 - A2 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 13, 0)}, // ADC1_IN13 - A4 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 14, 0)}, // ADC1_IN14 - A5 {NC, NP, 0} }; #endif @@ -58,8 +57,8 @@ WEAK const PinMap PinMap_ADC[] = { #ifdef HAL_DAC_MODULE_ENABLED WEAK const PinMap PinMap_DAC[] = { - {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 1, 0)}, // DAC1_OUT1 - {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 2, 0)}, // DAC1_OUT2 + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 1, 0)}, // DAC1_OUT1 - A10/D10 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 2, 0)}, // DAC1_OUT2 - A13/D13 {NC, NP, 0} }; #endif @@ -68,19 +67,19 @@ WEAK const PinMap PinMap_DAC[] = { #ifdef HAL_I2C_MODULE_ENABLED WEAK const PinMap PinMap_I2C_SDA[] = { - {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C3)}, - {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C1)}, - {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF5_I2C4)}, - {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C1)}, - {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C2)}, - {PB_11_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF3_I2C4)}, - {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C2)}, - {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C3)}, - {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF6_I2C3)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C3)}, // CTS + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C1)}, // SDA + {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF5_I2C4)}, // SDA + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C1)}, // D14 + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C2)}, // RX3 + {PB_11_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF3_I2C4)}, // RX3 + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C2)}, // MI + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C3)}, // A3 + {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF6_I2C3)}, // SDA3 // {PD_13, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C4)}, // NC - {PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C2)}, - {PF_15, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C4)}, - {PG_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C3)}, + {PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C2)}, // SDA2 + {PF_15, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C4)}, // D2 + {PG_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C3)}, // LPUART1_VCP_RX (RX0) // {PG_13, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C1)}, // NC {NC, NP, 0} }; @@ -88,18 +87,18 @@ WEAK const PinMap PinMap_I2C_SDA[] = { #ifdef HAL_I2C_MODULE_ENABLED WEAK const PinMap PinMap_I2C_SCL[] = { - {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C3)}, - {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C1)}, - {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF5_I2C4)}, + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C3)}, // A11/D11 + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C1)}, // SCL + {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF5_I2C4)}, // SCL // {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C1)}, // NC - {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C2)}, - {PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF3_I2C4)}, - {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C2)}, - {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C3)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C2)}, // TX3 + {PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF3_I2C4)}, // TX3 + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C2)}, // CTS3 + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C3)}, // A14/SCL3 // {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C4)}, // NC - {PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C2)}, + {PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C2)}, // SCL2 // {PF_14, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C4)}, // NC - {PG_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C3)}, + {PG_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF4_I2C3)}, // LPUART1_VCP_TX (TX0) {NC, NP, 0} }; #endif @@ -108,34 +107,34 @@ WEAK const PinMap PinMap_I2C_SCL[] = { #ifdef HAL_TIM_MODULE_ENABLED WEAK const PinMap PinMap_TIM[] = { - // {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - BAT VOLTAGE - // {PA_0_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 - BAT VOLTAGE + // {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - A8/BATTERY_VOLTAGE (STAT) + // {PA_0_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 - A8/BATTERY_VOLTAGE (STAT) {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 - A1 // {PA_1_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 - A1 // {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N - A1 - {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 - TX2 - // {PA_2_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 - TX2 - // {PA_2_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 - TX2 + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 - A9/TX2 + // {PA_2_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 - A9/TX2 + // {PA_2_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 - A9/TX2 {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 - A0 // {PA_3_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 - A0 // {PA_3_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 - A0 - {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - D13, A12 - // {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N - D13, A12 - {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 - D12, A11 - // {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 - D12, A11 - // {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N - D11, A10 - {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - D11, A10 - // {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - D11, A10 - // {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N - D11, A10 - // {PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 - D11, A10 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - A13/D13 + // {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N - A13/D13 + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 - A12/D12 + // {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 - A12/D12 + // {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N - A11/D11 + {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - A11/D11 + // {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - A11/D11 + // {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N - A11/D11 + // {PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 - A11/D11 // {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 - NC // {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 - TX // {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 - RX - // {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 - USB DM + // {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 - USB_DM // {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - JTDI - // {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N - QIO1 - {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 - QIO1 - // {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N - QIO1 + // {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N - A15/QIO1 + {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 - A15/QIO1 + // {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N - A15/QIO1 {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N - A6 // {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 - A6 // {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N - A6 @@ -175,9 +174,9 @@ WEAK const PinMap PinMap_TIM[] = { // {PE_0, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 - NC // {PE_1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 - D15 // {PE_3, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 - D4 - // {PE_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - Power Switch EN + // {PE_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - ENABLE_3V3 // {PE_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 - NC - // {PE_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 - DISCHARGE + // {PE_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 - DISCHARGE_3V3 // {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N - NC {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 - D6 // {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N - QCLK @@ -198,83 +197,83 @@ WEAK const PinMap PinMap_TIM[] = { #ifdef HAL_UART_MODULE_ENABLED WEAK const PinMap PinMap_UART_TX[] = { - // {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, // BAT VOLTAGE - {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, - {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, - {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, - {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, - {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, - {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, - {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, - {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, - // {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, // NC - // {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // NC - // {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART5)}, // NC - {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, - {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, - {PG_7, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, - // {PG_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // NC + // {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, // A8/BATTERY_VOLTAGE (STAT) + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // A9/TX2 + {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, // A9/TX2 + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // TX + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // SCL + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // TX3 + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // RX3 + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // A3 + {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // A4 + // {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, // NC + // {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // NC + // {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART5)}, // NC + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, // QEN + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // D1 + {PG_7, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // LPUART1_VCP_TX (TX0) + // {PG_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // NC {NC, NP, 0} }; #endif #ifdef HAL_UART_MODULE_ENABLED WEAK const PinMap PinMap_UART_RX[] = { - // {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, // UART4 NA - {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, - {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, - {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, - // {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_USART2)}, // JTDI - {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, - {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, - {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, - {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, - {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, - // {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, // UART4 NA - {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, - // {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART5)}, // UART5 NA - {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, - {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, - {PG_8, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, - // {PG_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // NC + // {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, // A1 + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // A0 + {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, // A0 + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // RX + // {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_USART2)}, // JTDI + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // SDA + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // TX3 + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // RX3 + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // A14/SCL3 + {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // A5 + // {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, // QCS + {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // QCS + // {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART5)}, // RTS3 + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, // RX2 + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // D0 + {PG_8, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // LPUART1_VCP_RX (RX0) + // {PG_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // NC {NC, NP, 0} }; #endif #ifdef HAL_UART_MODULE_ENABLED WEAK const PinMap PinMap_UART_RTS[] = { - {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, - // {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // USB DP - // {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, // JTDI - // {PA_15_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // JTDI - {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, - {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, - // {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // JTDO - // {PB_4, UART5, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART5)}, // UART5 NA + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, // A1 + // {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // USB_DP + // {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, // JTDI + // {PA_15_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // JTDI + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // A6 + {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // A6 + // {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // JTDO + // {PB_4, UART5, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART5)}, // CTS // {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // NC - {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, - {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, - {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, - // {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // NC + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // MI + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // RTS3 + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, // RTS2 + // {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // NC // {PG_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // NC - {PG_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, + {PG_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // RTS {NC, NP, 0} }; #endif #ifdef HAL_UART_MODULE_ENABLED WEAK const PinMap PinMap_UART_CTS[] = { - // {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, // BAT VOLTAGE - {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, - {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, - // {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // USB DM - {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, - // {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART5)}, // NC - // {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, // UART4 NA - {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, - {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, - {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, - // {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // NC + // {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, // A8/BATTERY_VOLTAGE (STAT) + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // A12/D12 + {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // A12/D12 + // {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // USB_DM + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // CTS + // {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART5)}, // NC + // {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, // SDA + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // CTS3 + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // CTS3 + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, // CTS2 + // {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // NC // {PG_5, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // NC {NC, NP, 0} }; @@ -284,17 +283,17 @@ WEAK const PinMap PinMap_UART_CTS[] = { #ifdef HAL_SPI_MODULE_ENABLED WEAK const PinMap PinMap_SPI_MOSI[] = { - {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, - // {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // USB DP + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // A11/D11 + // {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // USB_DP // {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // NC // {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // NC - {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, - {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_SPI2)}, - {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, // MO + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_SPI2)}, // A3 + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, // A2 // {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // NC - {PD_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, - // {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI3)}, // SPI3 NA - {PE_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, + {PD_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, // RTS2 + // {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI3)}, // RX2 + {PE_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // QIO3 // {PG_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // NC {NC, NP, 0} }; @@ -302,16 +301,16 @@ WEAK const PinMap PinMap_SPI_MOSI[] = { #ifdef HAL_SPI_MODULE_ENABLED WEAK const PinMap PinMap_SPI_MISO[] = { - {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, - // {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // USB DM - {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, - // {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // SPI3 NA - {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, - {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, - // {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // SPI3 NA - {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, - {PE_14, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, - // {PG_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // Version bit 3 + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // A12/D12 + // {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // USB_DM + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // CTS + // {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // CTS + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, // MI + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, // A7 + // {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // QCS + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, // CTS2 + {PE_14, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // QIO2 + // {PG_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // VERSION BIT 3 // {PG_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // NC {NC, NP, 0} }; @@ -319,18 +318,18 @@ WEAK const PinMap PinMap_SPI_MISO[] = { #ifdef HAL_SPI_MODULE_ENABLED WEAK const PinMap PinMap_SPI_SCLK[] = { - {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, - {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, - {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_SPI2)}, + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // A1 + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // A13/D13 + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_SPI2)}, // TX // {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // JTDO // {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // JTDO - {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, - {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, // TX3 + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, // CTS3 // {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // NC - {PD_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, - {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_SPI2)}, - {PE_13, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, - // {PG_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // Version bit 2 + {PD_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, // SCK + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_SPI2)}, // CTS2 + {PE_13, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // D3 + // {PG_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // VERSION BIT 2 // {PG_9, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // NC {NC, NP, 0} }; @@ -338,17 +337,17 @@ WEAK const PinMap PinMap_SPI_SCLK[] = { #ifdef HAL_SPI_MODULE_ENABLED WEAK const PinMap PinMap_SPI_SSEL[] = { - {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, - // {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // SPI3 NA + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // A10/D10 + // {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // A10/D10 // {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // JTDI // {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // JTDI - {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, - {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // A15/QIO1 + // {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, // D14 // {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, // NC - {PD_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, - {PE_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, + {PD_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, // CS + {PE_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // QIO0 // {PG_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // NC - // {PG_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // SPI3 NA + // {PG_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // RTS {NC, NP, 0} }; #endif @@ -357,18 +356,18 @@ WEAK const PinMap PinMap_SPI_SSEL[] = { #if defined(HAL_CAN_MODULE_ENABLED) || defined(HAL_CAN_LEGACY_MODULE_ENABLED) WEAK const PinMap PinMap_CAN_RD[] = { - // {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF9_CAN1)}, // USB DM + // {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF9_CAN1)}, // USB_DM // {PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF9_CAN1)}, // NC - {PD_0, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF9_CAN1)}, + {PD_0, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF9_CAN1)}, // CS {NC, NP, 0} }; #endif #if defined(HAL_CAN_MODULE_ENABLED) || defined(HAL_CAN_LEGACY_MODULE_ENABLED) WEAK const PinMap PinMap_CAN_TD[] = { - // {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF9_CAN1)}, // USB DP - {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF9_CAN1)}, - {PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF9_CAN1)}, + // {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF9_CAN1)}, // USB_DP + {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF9_CAN1)}, // D14 + {PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF9_CAN1)}, // SCK {NC, NP, 0} }; #endif @@ -379,27 +378,27 @@ WEAK const PinMap PinMap_CAN_TD[] = { #ifdef HAL_OSPI_MODULE_ENABLED WEAK const PinMap PinMap_OCTOSPI_DATA0[] = { - // {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0 - {PE_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0 - // {PF_0, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO0 - OCTOSPI2 NA + // {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0 - A6 + {PE_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0 - QIO0 + // {PF_0, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO0 - OCTOSPI2 - SDA2 {NC, NP, 0} }; #endif #ifdef HAL_OSPI_MODULE_ENABLED WEAK const PinMap PinMap_OCTOSPI_DATA1[] = { - {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1 - // {PE_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1 - // {PF_1, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO1 - OCTOSPI2 NA + {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1 - A15/QIO1 + // {PE_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1 - D3 + // {PF_1, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO1 - OCTOSPI2 - SCL2 {NC, NP, 0} }; #endif #ifdef HAL_OSPI_MODULE_ENABLED WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { - // {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2 - {PE_14, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2 - // {PF_2, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO2 - NC + // {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2 - A11/D11 + {PE_14, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2 - QIO2 + // {PF_2, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO2 - NC // {PF_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2 - NC {NC, NP, 0} }; @@ -407,9 +406,9 @@ WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { #ifdef HAL_OSPI_MODULE_ENABLED WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { - // {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3 - {PE_15, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3 - // {PF_3, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO3 - NC + // {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3 - A12/D12 + {PE_15, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3 - QIO3 + // {PF_3, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO3 - NC // {PF_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3 - NC {NC, NP, 0} }; @@ -417,60 +416,60 @@ WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { #ifdef HAL_OSPI_MODULE_ENABLED WEAK const PinMap PinMap_OCTOSPI_DATA4[] = { - // {PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO4 - // {PD_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO4 - // {PG_0, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO4 + // {PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO4 - A3 + // {PD_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO4 - RTS2 + // {PG_0, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO4 - VERSION BIT 0 {NC, NP, 0} }; #endif #ifdef HAL_OSPI_MODULE_ENABLED WEAK const PinMap PinMap_OCTOSPI_DATA5[] = { - // {PC_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO5 - // {PD_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO5 - // {PG_1, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO5 + // {PC_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO5 - A7 + // {PD_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO5 - QEN + // {PG_1, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO5 - VERSION BIT 1 {NC, NP, 0} }; #endif #ifdef HAL_OSPI_MODULE_ENABLED WEAK const PinMap PinMap_OCTOSPI_DATA6[] = { - // {PC_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6 - // {PD_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6 - // {PG_9, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO6 + // {PC_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6 - A2 + // {PD_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6 - RX2 + // {PG_9, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO6 {NC, NP, 0} }; #endif #ifdef HAL_OSPI_MODULE_ENABLED WEAK const PinMap PinMap_OCTOSPI_DATA7[] = { - // {PC_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO7 + // {PC_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO7 - A4 // {PD_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO7 - // {PG_10, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO7 + // {PG_10, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO7 {NC, NP, 0} }; #endif #ifdef HAL_OSPI_MODULE_ENABLED WEAK const PinMap PinMap_OCTOSPI_SCLK[] = { - // {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK - // {PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK - {PE_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK - // {PF_4, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_CLK - NC - // {PF_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK - NC + // {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK - A0 + // {PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK - TX3 + {PE_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK - QCLK + // {PF_4, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_CLK - NC + // {PF_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK - NC {NC, NP, 0} }; #endif #ifdef HAL_OSPI_MODULE_ENABLED WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { - // {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS - // {PA_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS - // {PB_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS - {PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS - // {PD_3, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P2)}, // OCTOSPIM_P2_NCS - OCTOSPI2 NA - // {PE_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS - // {PG_12, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_NCS - OCTOSPI2 NA + // {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS - A9/TX2 + // {PA_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS - A10/D10 + // {PB_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS - RX3 + {PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS - QCS + // {PD_3, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P2)}, // OCTOSPIM_P2_NCS - OCTOSPI2 - CTS2 + // {PE_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS - D5 + // {PG_12, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_NCS - OCTOSPI2 - RTS {NC, NP, 0} }; #endif @@ -480,13 +479,13 @@ WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { #if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) WEAK const PinMap PinMap_USB_OTG_FS[] = { // {PA_8, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF - NC - // {PA_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, LL_GPIO_PULL_NO, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS - // {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID - {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM - {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP + // {PA_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, LL_GPIO_PULL_NO, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS - TX + // {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID - RX + {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM - USB_DM + {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP - USB_DP // {PA_13, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE - SWDIO // {PA_14, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF - SWCLK - // {PC_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE + // {PC_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE - SDA3 {NC, NP, 0} }; #endif @@ -495,98 +494,98 @@ WEAK const PinMap PinMap_USB_OTG_FS[] = { #ifdef HAL_SD_MODULE_ENABLED WEAK const PinMap PinMap_SD_CMD[] = { - {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD + {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD - RTS3 {NC, NP, 0} }; #endif #ifdef HAL_SD_MODULE_ENABLED WEAK const PinMap PinMap_SD_CK[] = { - {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF12_SDMMC1)}, // SDMMC1_CK + // {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF12_SDMMC1)}, // SDMMC1_CK {NC, NP, 0} }; #endif #ifdef HAL_SD_MODULE_ENABLED WEAK const PinMap PinMap_SD_DATA0[] = { - {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0 + // {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0 {NC, NP, 0} }; #endif #ifdef HAL_SD_MODULE_ENABLED WEAK const PinMap PinMap_SD_DATA1[] = { - {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1 + {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1 - SDA3 {NC, NP, 0} }; #endif #ifdef HAL_SD_MODULE_ENABLED WEAK const PinMap PinMap_SD_DATA2[] = { - {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2 + // {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2 {NC, NP, 0} }; #endif #ifdef HAL_SD_MODULE_ENABLED WEAK const PinMap PinMap_SD_DATA3[] = { - {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3 + {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3 - QCS {NC, NP, 0} }; #endif #ifdef HAL_SD_MODULE_ENABLED WEAK const PinMap PinMap_SD_DATA4[] = { - {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4 + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4 - D1 {NC, NP, 0} }; #endif #ifdef HAL_SD_MODULE_ENABLED WEAK const PinMap PinMap_SD_DATA5[] = { - {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 - D14 {NC, NP, 0} }; #endif #ifdef HAL_SD_MODULE_ENABLED WEAK const PinMap PinMap_SD_DATA6[] = { - {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6 + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6 - USB_DETECT {NC, NP, 0} }; #endif #ifdef HAL_SD_MODULE_ENABLED WEAK const PinMap PinMap_SD_DATA7[] = { - {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7 + // {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7 {NC, NP, 0} }; #endif #ifdef HAL_SD_MODULE_ENABLED WEAK const PinMap PinMap_SD_CKIN[] = { - {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN + // {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN {NC, NP, 0} }; #endif #ifdef HAL_SD_MODULE_ENABLED WEAK const PinMap PinMap_SD_CDIR[] = { - {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR - D14 {NC, NP, 0} }; #endif #ifdef HAL_SD_MODULE_ENABLED WEAK const PinMap PinMap_SD_D0DIR[] = { - {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR - USB_DETECT {NC, NP, 0} }; #endif #ifdef HAL_SD_MODULE_ENABLED WEAK const PinMap PinMap_SD_D123DIR[] = { - {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + // {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR {NC, NP, 0} }; #endif diff --git a/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/variant_SWAN_R5.cpp b/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/variant_SWAN_R5.cpp index 4b67e774f7..f347ed4759 100644 --- a/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/variant_SWAN_R5.cpp +++ b/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/variant_SWAN_R5.cpp @@ -10,106 +10,107 @@ * ******************************************************************************* */ + #if defined(ARDUINO_SWAN_R5) #include "pins_arduino.h" // Digital PinName array const PinName digitalPin[] = { - PD_9, - PD_8, - PF_15, - PE_13, - PE_3, - PE_11, - PE_9, - PF_13, - PF_12, - PD_15, - PA_4, - PA_7, - PA_6, - PA_5, - PB_9, - PE_1, - PA_3, - PA_1, - PC_3, - PC_1, - PC_4, - PC_5, - PB_1, - PC_2, - PA_0, - PA_10, - PA_9, - PG_12, - PB_4, - PD_6, - PA_2, - PD_4, - PD_3, - PB_10, - PB_11, - PD_2, - PB_13, - PG_8, - PG_7, - PB_7, - PB_6, - PF_0, - PF_1, - PC_9, - PC_0, - PD_0, - PB_15, - PB_14, - PD_1, - PD_5, - PE_10, - PC_11, - PE_12, - PB_0, - PE_14, - PE_15, - PE_2, - PC_13, - PE_4, - PA_11, - PA_12, - PC_6, - PE_6, - PG_0, - PG_1, - PG_2, - PG_3, - PB_2, - PH_3, - PB_3, - PA_15, - PA_14, - PA_13, - PC_14, - PC_15 + PD_9, // 0 - D0 + PD_8, // 1 - D1 + PF_15, // 2 - D2 + PE_13, // 3 - D3 + PE_3, // 4 - D4 + PE_11, // 5 - D5 + PE_9, // 6 - D6 + PF_13, // 7 - D7 + PF_12, // 8 - D8 + PD_15, // 9 - D9 + PA_4, // 10 - A10/D10 + PA_7, // 11 - A11/D11 + PA_6, // 12 - A12/D12 + PA_5, // 13 - A13/D13 + PB_9, // 14 - D14 + PE_1, // 15 - D15 + PD_0, // 16 - CS + PA_3, // 17 - A0 + PA_1, // 18 - A1 + PC_3, // 19 - A2 + PC_1, // 20 - A3 + PC_4, // 21 - A4 + PC_5, // 22 - A5 + PB_1, // 23 - A6 + PD_1, // 24 - CK + PC_2, // 25 - A7 + PB_15, // 26 - MO + PB_14, // 27 - MI + PA_10, // 28 - RX + PG_12, // 29 - RTS + PA_9, // 30 - TX + PB_4, // 31 - CTS + PH_3, // 32 - B + PD_5, // 33 - QEN + PD_6, // 34 - RX2 + PA_2, // 35 - A9/TX2 + PD_4, // 36 - RTS2 + PD_3, // 37 - CTS2 + PB_11, // 38 - RX3 + PB_10, // 39 - TX3 + PD_2, // 40 - RTS3 + PB_13, // 41 - CTS3 + PB_6, // 42 - SCL + PF_1, // 43 - SCL2 + PB_7, // 44 - SDA + PF_0, // 45 - SDA2 + PC_9, // 46 - SDA3 + PC_0, // 47 - A14/SCL3 + PC_11, // 48 - QCS + PE_10, // 49 - QCLK + PE_15, // 50 - QIO3 + PE_14, // 51 - QIO2 + PB_0, // 52 - A15/QIO1 + PE_12, // 53 - QIO0 + PE_2, // 54 - LED_BUILTIN + PC_13, // 55 - USER_BTN + PA_13, // 56 - SWDIO + PA_14, // 57 - SWCLK + PB_3, // 58 - JTDO + PA_15, // 59 - JTDI + PG_7, // 60 - LPUART1_VCP_TX (TX0) + PG_8, // 61 - LPUART1_VCP_RX (RX0) + PE_4, // 62 - ENABLE_3V3 + PE_6, // 63 - DISCHARGE_3V3 + PA_0, // 64 - A8/BATTERY_VOLTAGE (STAT) + PC_6, // 65 - USB_DETECT + PA_11, // 66 - USB_DM + PA_12, // 67 - USB_DP + PC_14, // 68 - OSC32 IN (LSE) + PC_15, // 69 - OSC32 OUT (LSE) + PG_0, // 70 - VERSION BIT 0 + PG_1, // 71 - VERSION BIT 1 + PG_2, // 72 - VERSION BIT 2 + PG_3, // 73 - VERSION BIT 3 + PB_2 // 74 - BOOT1 (Do not connect to VDD) }; // Analog (Ax) pin number array const uint32_t analogInputPin[] = { - 16, // PA3, A0, - 17, // PA1, A1, - 18, // PC3, A2, - 19, // PC1, A3, - 20, // PC4, A4, - 21, // PC5, A5, - 22, // PB1, A6, - 23, // PC2, A7, - 24, // PA0, A8, - 10, // PA4, A9, D10 - 11, // PA7, A10, D11 - 12, // PA6, A11, D12 - 13, // PA5, A12, D13 - 30, // PA2, A13, - 44, // PC0, A14, - 53 // PB0, A15, + 17, // PA3, A0 + 18, // PA1, A1 + 19, // PC3, A2 + 20, // PC1, A3 + 21, // PC4, A4 + 22, // PC5, A5 + 23, // PB1, A6 + 25, // PC2, A7 + 64, // PA0, A8/BATTERY_VOLTAGE (STAT) + 35, // PA2, A9/TX2 + 10, // PA4, A10/D10 + 11, // PA7, A11/D11 + 12, // PA6, A12/D12 + 13, // PA5, A13/D13 + 47, // PC0, A14/SCL3 + 52 // PB0, A15/QIO1 }; // ---------------------------------------------------------------------------- @@ -122,48 +123,112 @@ WEAK void initVariant(void) { /* All pins set to high-Z (floating) initially */ /* DS12023 Rev 5, Section 3.10.5 - Reset mode: */ - /* In order to improve the consumption under reset, the I/Os state under and after reset is - * “analog state” (the I/O schmitt trigger is disable). In addition, the internal reset pull-up is - * deactivated when the reset source is internal. + /* In order to improve the consumption under reset, the I/Os state under + * and after reset is "analog state" (the I/O schmitt trigger is disabled). + * In addition, the internal reset pull-up is deactivated when the reset + * source is internal. */ - /* Turn on the 3V3 regulator */ - __HAL_RCC_GPIOE_CLK_ENABLE(); - GPIO_InitTypeDef GPIO_InitStruct; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Speed = GPIO_SPEED_LOW; - GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_6; - HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); - HAL_GPIO_WritePin(GPIOE, GPIO_InitStruct.Pin, GPIO_PIN_SET); + /* Configure the 3V3 regulator */ + { + __HAL_RCC_GPIOE_CLK_ENABLE(); + GPIO_InitTypeDef GPIO_InitStruct = {}; + GPIO_InitStruct.Speed = GPIO_SPEED_LOW; + + /* PE4 is ENABLE_3V3 */ + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pin = GPIO_PIN_4; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + + /* PE6 is DISCHARGE_3V3 */ + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; + GPIO_InitStruct.Pin = GPIO_PIN_6; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + + /* Enable 3V3 regulator and disable discharging */ + HAL_GPIO_WritePin(GPIOE, (GPIO_PIN_4 | GPIO_PIN_6), GPIO_PIN_SET); + } } /** - * @brief System Clock Configuration - * @param None - * @retval None - */ + * @brief System Clock Configuration - High-performance STM32L4R5xx with PLL from MSI + * + * Key features: + * - SYSCLK = 120 MHz from PLL (MSI Range 11 /6 x 30 /2 via PLLR) + * - USB FS uses MSI Range 11 as CLK48 source (48 MHz, RM0432 s.6.2.3) + * - OSPI clocked from SYSCLK (120 MHz) + * - ADC clocked from SYSCLK (120 MHz) + * - LSE enabled for RTC timing and MSI auto-calibration (MSIPLLEN) + * - Voltage Scale 1 Boost required for 120 MHz (RM0432 s.5.1.8) + * - MSI PLL-mode (MSIPLLEN) enabled after peripheral clocks to avoid premature MSIRDY deassertion during PeriphCLKConfig + * + * References: + * - RM0432 Rev 9 - STM32L4+ Series advanced Arm-based 32-bit MCUs + * (www.st.com/resource/en/reference_manual/rm0432-stm32l4-series-advanced-armbased-32bit-mcus-stmicroelectronics.pdf) + * - RM0432 s.5.1.8 - Dynamic voltage scaling management: Range 1 boost mode up to 120 MHz + * - RM0432 s.6.2.3 - MSI clock: MSI as CLK48 source for USB FS in Range 11; MSI PLL-mode (MSIPLLEN) + * - RM0432 s.6.2.5 - PLL: source input range 4-16 MHz + * - RM0432 s.6.4.4 - PLL configuration register (RCC_PLLCFGR): PLLM/PLLN/PLLR fields; + * VCO input 2.66-8 MHz; VCO output 64-344 MHz; PLLR drives SYSCLK + * - RM0432 Table 12 - Flash latency: 5 wait states at 120 MHz in Range 1 Boost + * - RM0432 s.6.4.29 - RCC_BDCR: LSEDRV[1:0] = 01 for medium low drive capability + * - AN2867 Rev 23 (Jan 2025) - Guidelines for oscillator design on STM32 MCUs/MPUs + * (www.st.com/resource/en/application_note/an2867-guidelines-for-oscillator-design-on-stm8afals-and-stm32-mcusmpus-stmicroelectronics.pdf) + */ WEAK void SystemClock_Config(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; - /** Configure the main internal regulator output voltage + /** Enable PWR peripheral clock + * + * RM0432 s.6.4.19: PWREN (RCC_APB1ENR1 bit 28) resets to 0, so this call + * is required before accessing any PWR register (e.g., + * HAL_PWREx_ControlVoltageScaling below). + * CubeMX generates this unconditionally for all STM32L4 projects. */ + __HAL_RCC_PWR_CLK_ENABLE(); + + /* Voltage scaling - Scale 1 Boost required for SYSCLK = 120 MHz + * RM0432 s.5.1.8: "In Range 1 boost mode (R1MODE = 0), the maximum system + * clock frequency is 120 MHz" + */ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) != HAL_OK) { Error_Handler(); } + /** Configure LSE Drive Capability + * + * Use MEDIUMLOW (not LOW): RCC_LSEDRIVE_LOW risks marginal LSE startup on units + * near the crystal ESR tolerance limit and degrades MSI PLL mode (MSIPLLEN) lock + * quality. ST recommends MEDIUMLOW as the minimum when MSIPLLEN is in use. + * (RM0432 s.6.4.29; AN2867 Rev 23) + * + * Backup domain access must be enabled before configuring LSE, as RCC->BDCR + * is write-protected after reset and silently ignores writes until the lock + * is cleared. */ HAL_PWR_EnableBkUpAccess(); __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_MEDIUMLOW); + /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. + * + * Oscillator configuration summary: + * - MSI: MSIRANGE_11 (48 MHz) -- PLL source and USB CLK48 (RM0432 s.6.2.3) + * - LSE: ON -- for RTC and MSI auto-calibration (MSIPLLEN) + * - PLL: ON (MSI 48 MHz / PLLM=6 x PLLN=30 / PLLR=2 = 120 MHz) + * - PLL source: 48 MHz (4-16 MHz range, RM0432 s.6.2.5) + * - PLL input (after PLLM): 48/6 = 8 MHz (2.66-8 MHz range, RM0432 s.6.4.4) + * - VCO: 8x30 = 240 MHz (64-344 MHz range, RM0432 s.6.4.4) + * - SYSCLK from PLLR/2 = 120 MHz (RM0432 s.6.4.4) */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE + | RCC_OSCILLATORTYPE_MSI; RCC_OscInitStruct.LSEState = RCC_LSE_ON; RCC_OscInitStruct.MSIState = RCC_MSI_ON; - RCC_OscInitStruct.MSICalibrationValue = 0; + RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; @@ -175,28 +240,51 @@ WEAK void SystemClock_Config(void) if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } + /** Initializes the CPU, AHB and APB buses clocks + * + * SYSCLK = PLLCLK (120 MHz). No AHB/APB dividers. */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK - | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 + | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_SYSCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + /* FLASH_LATENCY_5: required for 120 MHz at Range 1 Boost (RM0432 Table 12) */ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { Error_Handler(); } - PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SDMMC1 - | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_OSPI; + + /** Initializes the Peripheral clocks + * + * USB clock: MSI Range 11 (48 MHz). RM0432 s.6.2.3: "The MSI clock can be + * selected as clock source for the USB FS device, SDMMC1 and RNG when the + * MSI is in Range 11 (48 MHz)." + * OSPI and ADC clocked from SYSCLK (120 MHz). + */ + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC + | RCC_PERIPHCLK_OSPI + | RCC_PERIPHCLK_USB; PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_SYSCLK; PeriphClkInit.OspiClockSelection = RCC_OSPICLKSOURCE_SYSCLK; PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_MSI; - PeriphClkInit.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_MSI; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { Error_Handler(); } - /** Enable MSI Auto calibration + + /** Enable MSI Auto calibration (MSIPLLEN, RCC_CR[2]) + * + * RM0432 s.6.2.3: setting MSIPLLEN causes the MSI hardware to automatically + * trim itself against LSE as a phase reference. LSE must already be stable + * (LSERDY=1) before the bit is set -- guaranteed here because + * HAL_RCC_OscConfig() waited for LSERDY before returning. + * + * This call must come AFTER HAL_RCCEx_PeriphCLKConfig() -- setting MSIPLLEN + * causes MSIRDY to deassert transiently while MSI re-synchronises to LSE. + * Because SYSCLK is PLLCLK (120 MHz), SysTick is decoupled from MSI and + * HAL_GetTick() remains reliable; the concern is HAL routines that check + * MSIRDY as a readiness flag, all of which must complete before this call. */ HAL_RCCEx_EnableMSIPLLMode(); } diff --git a/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/variant_SWAN_R5.h b/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/variant_SWAN_R5.h index 01f0144f33..3860b534ca 100644 --- a/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/variant_SWAN_R5.h +++ b/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/variant_SWAN_R5.h @@ -14,252 +14,259 @@ /*---------------------------------------------------------------------------- * STM32 pins number + *---------------------------------------------------------------------------- + * Arduino digital pin numbers on the right (indexes into the digitalPin[] array) + * and the STM32 pins they correspond to on the left. The only apparent + * function I can see is to reference a pin in a sketch in something + * like digitalWrite() and have it index into digitalPin[] to find the + * actual pin. On the other hand, PIN_A* are numbers offset by PNUM_ANALOG_BASE, + * which serves to say that this IS an analog pin and which tells analogWrite + * to index into the digitalPin[] array to find the actual pin. *----------------------------------------------------------------------------*/ -#define PD9 0 -#define PD8 1 -#define PF15 2 -#define PE13 3 -#define PE3 4 -#define PE11 5 -#define PE9 6 -#define PF13 7 -#define PF12 8 -#define PD15 9 -#define PA4 PIN_A9 -#define PA7 PIN_A10 -#define PA6 PIN_A11 -#define PA5 PIN_A12 -#define PB9 14 -#define PE1 15 -#define PA3 PIN_A0 -#define PA1 PIN_A1 -#define PC3 PIN_A2 -#define PC1 PIN_A3 -#define PC4 PIN_A4 -#define PC5 PIN_A5 -#define PB1 PIN_A6 -#define PC2 PIN_A7 -#define PA0 PIN_A8 // BAT VOLTAGE -#define PA10 25 // RX -#define PA9 26 // TX -#define PG12 27 // RTS -#define PB4 28 // CTS -#define PD6 29 // RX2 -#define PA2 PIN_A13 // TX2 -#define PD4 31 // RTS2 -#define PD3 32 // CTS2 -#define PB10 33 // TX3 -#define PB11 34 // RX3 -#define PD2 35 // RTS3 -#define PB13 36 // CTS3 -#define PG8 37 // RX0 -#define PG7 38 // TX0 -#define PB7 39 // SDA -#define PB6 40 // SCL -#define PF0 41 // SDA2 -#define PF1 42 // SCL2 -#define PC9 43 // SDA3 -#define PC0 PIN_A14 // SCL3 -#define PD0 45 // CS -#define PB15 46 // MO -#define PB14 47 // MI -#define PD1 48 // SCK -#define PD5 49 // QEN -#define PE10 50 // QCLK -#define PC11 51 // QCS -#define PE12 52 // QIO0 -#define PB0 PIN_A15 // QIO1 -#define PE14 54 // QIO2 -#define PE15 55 // QIO3 -#define PE2 56 // User LED -#define PC13 57 // User button - active-low -#define PE4 58 // Power Switch EN -#define PA11 59 // USB DM -#define PA12 60 // USB DP -#define PC6 61 // USB_DETECT -#define PE6 62 // DISCHARGE -#define PG0 63 // Version bit 0 -#define PG1 64 // Version bit 1 -#define PG2 65 // Version bit 2 -#define PG3 66 // Version bit 3 -#define PB2 67 // BOOT1 - Do not connect to VDD -#define PH3 68 // BOOT0 button -#define PB3 69 // JTDO -#define PA15 70 // JTDI -#define PA14 71 // SWCLK -#define PA13 72 // SWDIO -#define PC14 73 // OSC32 IN -#define PC15 74 // OSC32 OUT - -// pins not connected -// #define PA8 -// #define PB5 -// #define PB8 -// #define PB12 -// #define PC7 -// #define PC8 -// #define PC10 -// #define PC12 -// #define PD7 -// #define PD10 -// #define PD11 -// #define PD12 -// #define PD13 -// #define PD14 -// #define PE0 -// #define PE5 -// #define PE7 -// #define PE8 -// #define PF2 -// #define PF3 -// #define PF4 -// #define PF5 -// #define PF6 -// #define PF7 -// #define PF10 -// #define PF11 -// #define PF14 -// #define PG4 -// #define PG5 -// #define PG6 -// #define PG9 -// #define PG10 -// #define PG13 -// #define PH0 -// #define PH1 +#define PA0 PIN_A8 // A8/BATTERY_VOLTAGE (STAT) +#define PA1 PIN_A1 // A1 +#define PA2 PIN_A9 // A9/TX2 +#define PA3 PIN_A0 // A0 +#define PA4 PIN_A10 // A10/D10 +#define PA5 PIN_A13 // A13/D13 +#define PA6 PIN_A12 // A12/D12 +#define PA7 PIN_A11 // A11/D11 +#define PA9 30 // TX +#define PA10 28 // RX +#define PA11 66 // USB_DM +#define PA12 67 // USB_DP +#define PA13 56 // SWDIO +#define PA14 57 // SWCLK +#define PA15 59 // JTDI +#define PB0 PIN_A15 // A15/QIO1 +#define PB1 PIN_A6 // A6 +#define PB2 74 // BOOT1 (Do not connect to VDD) +#define PB3 58 // JTDO +#define PB4 31 // CTS +#define PB6 42 // SCL +#define PB7 44 // SDA +#define PB9 14 // D14 +#define PB10 39 // TX3 +#define PB11 38 // RX3 +#define PB13 41 // CTS3 +#define PB14 27 // MI +#define PB15 26 // MO +#define PC0 PIN_A14 // A14/SCL3 +#define PC1 PIN_A3 // A3 +#define PC2 PIN_A7 // A7 +#define PC3 PIN_A2 // A2 +#define PC4 PIN_A4 // A4 +#define PC5 PIN_A5 // A5 +#define PC6 65 // USB_DETECT +#define PC9 46 // SDA3 +#define PC11 48 // QCS +#define PC13 55 // USER_BTN +#define PC14 68 // OSC32 IN (LSE) +#define PC15 69 // OSC32 OUT (LSE) +#define PD0 16 // CS +#define PD1 24 // SCK +#define PD2 40 // RTS3 +#define PD3 37 // CTS2 +#define PD4 36 // RTS2 +#define PD5 33 // QEN +#define PD6 34 // RX2 +#define PD8 1 // D1 +#define PD9 0 // D0 +#define PD15 9 // D9 +#define PE1 15 // D15 +#define PE2 54 // LED_BUILTIN +#define PE3 4 // D4 +#define PE4 62 // ENABLE_3V3 +#define PE6 63 // DISCHARGE_3V3 +#define PE9 6 // D6 +#define PE10 49 // QCLK +#define PE11 5 // D5 +#define PE12 53 // QIO0 +#define PE13 3 // D3 +#define PE14 51 // QIO2 +#define PE15 50 // QIO3 +#define PF0 45 // SDA2 +#define PF1 43 // SCL2 +#define PF12 8 // D8 +#define PF13 7 // D7 +#define PF15 2 // D2 +#define PG0 70 // VERSION BIT 0 +#define PG1 71 // VERSION BIT 1 +#define PG2 72 // VERSION BIT 2 +#define PG3 73 // VERSION BIT 3 +#define PG7 60 // LPUART1_VCP_TX (TX0) +#define PG8 61 // LPUART1_VCP_RX (RX0) +#define PG12 29 // RTS +#define PH3 32 // B // Alternate pins number -// #define PA0_ALT1 (PA0 | ALT1) // BAT VOLTAGE -#define PA1_ALT1 (PA1 | ALT1) -#define PA1_ALT2 (PA1 | ALT2) -#define PA2_ALT1 (PA2 | ALT1) -#define PA2_ALT2 (PA2 | ALT2) -#define PA3_ALT1 (PA3 | ALT1) -#define PA3_ALT2 (PA3 | ALT2) -#define PA4_ALT1 (PA4 | ALT1) -#define PA5_ALT1 (PA5 | ALT1) -#define PA6_ALT1 (PA6 | ALT1) -#define PA7_ALT1 (PA7 | ALT1) -#define PA7_ALT2 (PA7 | ALT2) -#define PA7_ALT3 (PA7 | ALT3) -#define PA15_ALT1 (PA15 | ALT1) -#define PB0_ALT1 (PB0 | ALT1) -#define PB0_ALT2 (PB0 | ALT2) -#define PB1_ALT1 (PB1 | ALT1) -#define PB1_ALT2 (PB1 | ALT2) -#define PB3_ALT1 (PB3 | ALT1) -#define PB4_ALT1 (PB4 | ALT1) -// #define PB5_ALT1 (PB5 | ALT1) // NC -#define PB6_ALT1 (PB6 | ALT1) -#define PB7_ALT1 (PB7 | ALT1) -// #define PB8_ALT1 (PB8 | ALT1) // NC -#define PB9_ALT1 (PB9 | ALT1) -#define PB10_ALT1 (PB10 | ALT1) -#define PB11_ALT1 (PB11 | ALT1) -#define PB13_ALT1 (PB13 | ALT1) -#define PB14_ALT1 (PB14 | ALT1) -#define PB14_ALT2 (PB14 | ALT2) -#define PB15_ALT1 (PB15 | ALT1) -#define PB15_ALT2 (PB15 | ALT2) -#define PC6_ALT1 (PC6 | ALT1) -// #define PC7_ALT1 (PC7 | ALT1) // NC -// #define PC8_ALT1 (PC8 | ALT1) // NC -#define PC9_ALT1 (PC9 | ALT1) -// #define PC10_ALT1 (PC10 | ALT1) // NC -#define PC11_ALT1 (PC11 | ALT1) +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA2_ALT2 (PA2 | ALT2) +#define PA3_ALT1 (PA3 | ALT1) +#define PA3_ALT2 (PA3 | ALT2) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PB10_ALT1 (PB10 | ALT1) +#define PB11_ALT1 (PB11 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PC6_ALT1 (PC6 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) -#define NUM_DIGITAL_PINS 75 -#define NUM_ANALOG_INPUTS 16 +#define NUM_DIGITAL_PINS 75 +#define NUM_ANALOG_INPUTS 16 // On-board LED pin number #ifndef LED_BUILTIN - #define LED_BUILTIN PE2 + #define LED_BUILTIN PE2 #endif // On-board user button #ifndef USER_BTN - #define USER_BTN PC13 + #define USER_BTN PC13 #endif // Power switch ENABLE and DISCHARGE pins #ifndef ENABLE_3V3 - #define ENABLE_3V3 PE4 + #define ENABLE_3V3 PE4 #endif #ifndef DISCHARGE_3V3 - #define DISCHARGE_3V3 PE6 - #define DISABLE_DISCHARGING HIGH - #define ENABLE_DISCHARGING LOW + #define DISCHARGE_3V3 PE6 + #define DISABLE_DISCHARGING HIGH + #define ENABLE_DISCHARGING LOW +#endif + +// Macro functions for 3V3 regulator management +#ifndef ENABLE_3V3_REGULATOR +# define ENABLE_3V3_REGULATOR() do { \ + digitalWrite(DISCHARGE_3V3, DISABLE_DISCHARGING); \ + digitalWrite(ENABLE_3V3, HIGH); \ + } while (0) +#endif +#ifndef DISABLE_3V3_REGULATOR +# define DISABLE_3V3_REGULATOR() do { \ + digitalWrite(ENABLE_3V3, LOW); \ + } while (0) +#endif +#ifndef DRAIN_3V3_REGULATOR_MS +# define DRAIN_3V3_REGULATOR_MS(ms) do { \ + if (digitalRead(ENABLE_3V3)) { break; } \ + digitalWrite(DISCHARGE_3V3, ENABLE_DISCHARGING); \ + delay(ms); \ + digitalWrite(DISCHARGE_3V3, DISABLE_DISCHARGING); \ + } while (0) +#endif + +// Dedicated board pins +#ifndef VMAIN_ADC + #define VMAIN_ADC PA0 + #define VMAIN_ADC_DIV_BOT_R 4.3f + #define VMAIN_ADC_DIV_TOP_R 10.0f + #define VMAIN_ADC_DIV_K ((double)((VMAIN_ADC_DIV_TOP_R + VMAIN_ADC_DIV_BOT_R) / VMAIN_ADC_DIV_BOT_R)) +#endif +#ifndef VMAIN_MV +# define VMAIN_MV() ({ \ + __HAL_ADC_CALC_DATA_TO_VOLTAGE(__LL_ADC_CALC_VREFANALOG_VOLTAGE(analogRead(AVREF), LL_ADC_GetResolution(ADC1)), analogRead(VMAIN_ADC), LL_ADC_GetResolution(ADC1)) * VMAIN_ADC_DIV_K; \ + }) +#endif +// Charge detection is not implemented on the Swan hardware +// #ifndef CHARGE_DETECT +// #define CHARGE_DETECT +// #endif +#ifndef USB_DETECT + #define USB_DETECT PC6 #endif // SPI definitions #ifndef PIN_SPI_SS - #define PIN_SPI_SS PD0 + #define PIN_SPI_SS PD0 #endif #ifndef PIN_SPI_MOSI - #define PIN_SPI_MOSI PB15 + #define PIN_SPI_MOSI PB15 #endif #ifndef PIN_SPI_MISO - #define PIN_SPI_MISO PB14 + #define PIN_SPI_MISO PB14 #endif #ifndef PIN_SPI_SCK - #define PIN_SPI_SCK PD1 + #define PIN_SPI_SCK PD1 #endif // I2C definitions #ifndef PIN_WIRE_SDA - #define PIN_WIRE_SDA PB7 + #define PIN_WIRE_SDA PB7 #endif #ifndef PIN_WIRE_SCL - #define PIN_WIRE_SCL PB6 + #define PIN_WIRE_SCL PB6 #endif // Timer Definitions // Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin #ifndef TIMER_TONE - #define TIMER_TONE TIM6 + #define TIMER_TONE TIM6 #endif #ifndef TIMER_SERVO - #define TIMER_SERVO TIM7 + #define TIMER_SERVO TIM7 #endif // UART Definitions #ifndef SERIAL_UART_INSTANCE - #define SERIAL_UART_INSTANCE 1 + #define SERIAL_UART_INSTANCE 1 #endif // Default pin used for generic 'Serial' instance // Mandatory for Firmata #ifndef PIN_SERIAL_RX - #define PIN_SERIAL_RX PA10 + #define PIN_SERIAL_RX PA10 #endif #ifndef PIN_SERIAL_TX - #define PIN_SERIAL_TX PA9 + #define PIN_SERIAL_TX PA9 #endif // Default pin used for generic 'Serial3' instance #ifndef PIN_SERIAL3_RX - #define PIN_SERIAL3_RX PC5 + #define PIN_SERIAL3_RX PC5 #endif #ifndef PIN_SERIAL3_TX - #define PIN_SERIAL3_TX PC4 + #define PIN_SERIAL3_TX PC4 #endif // LPUART1 #ifndef PIN_SERIAL_LP1_RX - #define PIN_SERIAL_LP1_RX PG8 + #define PIN_SERIAL_LP1_RX PG8 #endif #ifndef PIN_SERIAL_LP1_TX - #define PIN_SERIAL_LP1_TX PG7 + #define PIN_SERIAL_LP1_TX PG7 #endif // Virtual COM Port for Swans with a 14-pin STLink Connector mounted. // To use the STLINK's Virtual COM port, this would be added to an Arduino project: // HardwareSerial SerialVCP(PIN_VCP_RX, PIN_VCP_TX); #ifndef PIN_VCP_RX - #define PIN_VCP_RX PIN_SERIAL_LP1_RX + #define PIN_VCP_RX PIN_SERIAL_LP1_RX #endif #ifndef PIN_VCP_TX - #define PIN_VCP_TX PIN_SERIAL_LP1_TX + #define PIN_VCP_TX PIN_SERIAL_LP1_TX #endif // Extra HAL modules