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<!DOCTYPE html>
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MBus
| Research Paper
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<i>An ultra-low power bus</i>
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<h2>Publications related to MBus</h2>
<p>
We have two refereed conference publications and two journal articles on MBus.
The Top Picks article provides a slightly less technical overview of MBus,
covering the design motivations and key architectural tenets for an
interconnect for microscale systems.
The ISCA ’15 publication takes a holisitic view of the ultra-low
power and micro-scale system design space, identifies the architectural
constraints, and walks through the design choices and methodology of MBus.
The CICC ’14 publication introduces the novel circuit designs
that enable MBus, and the JSTS ’16 article expands these
arguments and adds details from implemented systems.
</p>
<div class="well well-clear">
<h3><a href="/static/pannuto16mbus-top-picks.pdf">MBus: A system integration bus for the modular microscale computing class</a></h3>
<h4>IEEE Micro Top Picks '16</h4>
<p>
MBus is a new interchip interconnect made of two
“shoot-through” rings that resolves fundamental size and
power issues that prevent the design of composable
microscale systems. MBus introduces power-oblivious
communication, which guarantees message reception
regardless of the recipient's power state. This
disentangles power management from communication,
greatly simplifying the creation of viable, modular, and
heterogeneous systems that operate on the order of
nanowatts.
</p>
<p><a id="pannuto16mbus-bibtex-button">(Bibtex)</a></p>
<div id="pannuto16mbus-bibtex" style="display: none;">
<pre>
@INPROCEEDINGS{pannuto16mbus,
author={Pannuto, Pat and Lee, Yoonmyung and Kuo, Ye-Sheng and Foo, ZhiYoong and Kempke, Benjamin and Kim, Gyouho and Dreslinski, Ronald G and Blaauw, David and Dutta, Prabal},
title = {{MBus}: A System Integration Bus for the Modular Micro-Scale Computing Class},
journal = {IEEE Micro: Special Issue on Top Picks from Computer Architecture Conferences},
series = {Micro~Top~Picks},
volume = {37},
number = {3},
month = {May},
year = {2016},
}</pre>
</div>
</div>
<div class="well well-clear">
<h3><a href="/static/lee16mbus.pdf">MBus: A Fully Synthesizable Low-power Portable Interconnect Bus for Millimeter-scale Sensor Systems</a></h3>
<h4>Journal of Semiconductor Technology and Science, Vol.16, No.6</h4>
<p>
This paper presents a fully synthesizable low power interconnect bus for
millimeter-scale wireless sensor nodes. A segmented ring bus topology
minimizes the required chip real estate with low input/output pad count for
ultra-small form factors. By avoiding the conventional open drain-based
solution, the bus can be fully synthesizable. Low power is achieved by
obviating a need for local oscillators in member nodes. Also, aggressive
power gating allows low-power standby mode with only 53 gates powered on.
An integrated wakeup scheme is compatible with a power management unit that
has nW standby mode. A 3-module system including the bus is fabricated in a
180nm process. The entiresystem consumes 8nW in standby mode, and the bus
achieves 17.5pJ/bit/chip.
</p>
<p><a id="lee16mbus-bibtex-button">(Bibtex)</a></p>
<div id="lee16mbus-bibtex" style="display: none;">
<pre>
@article{lee16mbus,
author={Lee, Inhee and Kuo, Ye-Sheng and Pannuto, Pat and Kim, Gyouho and Foo, ZhiYoong and Kempke, Ben and Jeong, Seokhyeon and Kim, Yejoong and Dutta, Prabal and Blaauw, David and Lee, Yoonmyung},
title={{MBus}: A Fully Synthesizable Low-power Portable Interconnect Bus for Millimeter-scale Sensor Systems},
journal={Journal of Semiconductor Technology and Science},
volume={16},
number={6},
pages={745--753},
year={2016},
month={12},
doi={10.5573/JSTS.2016.16.6.745},
}</pre>
</div>
</div>
<div class="well well-clear">
<h3><a href="/static/pannuto15mbus.pdf">MBus: An Ultra-Low Power Interconnect Bus for Next Generation Nanopower Systems</a></h3>
<h4>ISCA '15</h4>
<p>
As we show in this paper, I/O has become the limiting factor in scaling
down size and power toward the goal of invisible computing. Achieving
this goal will require composing optimized and specialized—yet
reusable—components with an interconnect that permits tiny, ultra-low
power systems. In contrast to today’s interconnects which are limited by
power-hungry pull-ups or high-overhead chip-select lines, our approach
provides a superset of common bus features but at lower power, with fixed
area and pin count, using fully synthesizable logic, and with
surprisingly low protocol overhead.
</p>
<p>
We present MBus, a new 4-pin, 22.6 pJ/bit/chip chip-to-chip interconnect
made of two “shoot-through” rings. MBus facilitates ultra-low power
system operation by implementing automatic power-gating of each chip in
the system, easing the integration of active, inactive, and activating
circuits on a single die. In addition, we introduce a new bus
primitive: power oblivious communication, which guarantees message reception
regardless of the recipient's power state when a message is sent.
This disentangles power-management from communication, greatly
simplifying the creation of viable, modular, and heterogeneous systems
that operate on the order of nanowatts.
</p>
<p>
To evaluate the viability, power, performance, overhead, and scalability
of our design, we build both hardware and software implementations of
MBus and show its seamless operation across two FPGAs and twelve custom
chips from three different semiconductor processes. A three-chip, 2.2 mm3
MBus system draws 8 nW of total system standby power and uses only
22.6 pJ/bit/chip for communication. This is the lowest power for any
system bus with MBus’s feature set.
</p>
<p><a id="pannuto15mbus-bibtex-button">(Bibtex)</a></p>
<div id="pannuto15mbus-bibtex" style="display: none;">
<pre>
@INPROCEEDINGS{pannuto15mbus,
author={Pannuto, Pat and Lee, Yoonmyung and Kuo, Ye-Sheng and Foo, ZhiYoong and Kempke, Benjamin and Kim, Gyouho and Dreslinski, Ronald G and Blaauw, David and Dutta, Prabal},
title={{MBus}: An Ultra-Low Power Interconnect Bus for Next Generation Nanopower Systems},
booktitle={Proceedings of the 42nd International Symposium on Computer Architecture},
series={ISCA '15},
year={2015},
month={June},
location={Portland, Oregon, USA},
publisher={ACM},
conference-url={\url{http://www.ece.cmu.edu/calcm/isca2015}},
}</pre>
</div>
</div>
<div class="well well-clear">
<h3><a href="/static/kuo14mbus.pdf">MBus: A 17.5 pJ/bit/chip Portable Interconnect Bus for Millimeter-Scale Sensor Systems with 8 nW Standby Power</a></h3>
<h4>CICC '14</h4>
<p>
We propose an ultra-low power interconnect bus for millimeter-scale
wireless sensor nodes. Using only 4 IO pads, the bus minimizes the
required chip real estate, enabling ultra-small form factors in modular
sensor node designs. Low power is achieved using a “clockless” design of
member nodes while aggressive power gating allows an ultra-low power
standby mode with only 53 gates powered on. An integrated wakeup scheme
is compatible with PMUs that have a special low power standby mode. The
MBus is fully synthesizable and uses robust timing. Implemented in a
3 module system in 180 nm technology, Mbus achieves 8nW of
standby power and 17.5 pJ/bit/chip.
</p>
<p><a id="kuo14mbus-bibtex-button">(Bibtex)</a></p>
<div id="kuo14mbus-bibtex" style="display: none;">
<pre>
@INPROCEEDINGS{kuo14mbus,
author={Kuo, Ye-Sheng and Pannuto, Pat and Kim, Gyouho and Foo, Zhi~{Y}oong and Lee, Inhee and Kempke, Benjamin and Dutta, Prabal and Blaauw, David and Lee, Yoonmyung},
booktitle={IEEE Custom Integrated Circuits Conference},
series = {CICC '14},
title={{MBus}: A 17.5~{pJ}/bit Portable Interconnect Bus for Millimeter-Scale Sensor Systems with 8~{nW} Standby Power},
year={2014},
month={September},
location={San Jose, CA, USA},
conference-url={http://www.ieee-cicc.org},
}</pre>
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